makefile - Automatically naming and choosing dependency file -


in following makefile snippet:

common.o :     $(cxx) $(cppflags) $(cxxflags) -mf "$@.d" -c miwt_os/dispatcher/common.cpp -include commono.o.d  array_safe.o :     $(cxx) $(cppflags) $(cxxflags) -mf "$@.d" -c miwt_os/dispatcher/array_safe.cpp -include array_safe.o.d  tstamp.o :     $(cxx) $(cppflags) $(cxxflags) -mf "$@.d" -c miwt_os/dispatcher/tstamp.cpp -include tstamp.o.d  cbor_encoder.o :     $(cxx) $(cppflags) $(cxxflags) -mf "$@.d" -c miwt_os/coap/cbor_encoder.cpp -include cbor_encoder.o.d  cbor_encoder_test.o :      $(cxx) $(cppflags) $(cxxflags) -mf "$@.d" -c miwt_os/coap/unittest/cbor_encoder_test.cpp -include cbor_encoder_test.o.d  cbor_encoder_test : array_safe.o tstamp.o cbor_encoder_test.o cbor_encoder.o \                     common.o gmock_main.a     $(cxx) $(cppflags) $(cxxflags) -lpthread $^ -o $@

notice how dependency file name auto-generated "$@.d", when included, have manually enter name of dependency file. way automatically generate dependency file name?

if had variable containing list of object files, instead of inlining them, trivial:

objs = array_safe.o tstamp.o cbor_encoder_test.o cbor_encoder.o common.o  -include $(addsuffix .d,$(objs))  cbor_encoder_test : $(objs) gmock_main.a         ...

i should point out method of dealing auto-generated header files suboptimal; there better ways.


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