vhdl - issue with inout parameter in procedure -
i writing bus functional model testbench, using procedure handle read , write operations, ideally use 1 bus declared inout.
i using record type instantiate bus, when declare inout parameter in procedure call appears work signals outputs procedure, not recognize inputs procedure. signal inputs uninitialized "u". know synthesis method not work, testbench thought possible instantiate bus inout.
my record type , procedure instantiated follows:
type t_apbp_intf record -- apb-pipe interface paddr : std_logic_vector(31 downto 0); psel : std_logic; penable : std_logic; pwrite : std_logic; pwdata : std_logic_vector(31 downto 0); pstrb : std_logic_vector(3 downto 0); prdata : std_logic_vector(31 downto 0); pready : std_logic; pslverr : std_logic; prdvld : std_logic; end record t_apbp_intf; procedure nai_bus_cyc( wr_rd_n : in std_logic; addr_in : in std_logic_vector(31 downto 0); -- address data_in : in std_logic_vector(31 downto 0); -- data written signal tb_m_apbp : inout t_apbp_intf) begin if wr_rd_n = c_bus_wr wait until rising_edge(tb_clk); tb_m_apbp.paddr <= addr_in; tb_m_apbp.psel <= '1'; tb_m_apbp.penable <= '1'; tb_m_apbp.pwrite <= '1'; tb_m_apbp.pwdata <= data_in; tb_m_apbp.pstrb <= "1111"; wait until rising_edge(tb_clk) , (tb_m_apbp.pready = '1'); tb_m_apbp.paddr <= (others => '0'); tb_m_apbp.psel <= '0'; tb_m_apbp.penable <= '0'; tb_m_apbp.pwrite <= '0'; tb_m_apbp.pwdata <= (others => '0'); tb_m_apbp.pstrb <= "0000"; else wait until rising_edge(tb_clk); tb_m_apbp.paddr <= addr_in; tb_m_apbp.psel <= '1'; tb_m_apbp.penable <= '1'; tb_m_apbp.pwrite <= '0'; tb_m_apbp.pwdata <= (others => '0'); tb_m_apbp.pstrb <= "0000"; wait until rising_edge(tb_clk) , (tb_sprvalid_bus = '1'); tb_m_apbp.paddr <= (others => '0'); tb_m_apbp.psel <= '0'; tb_m_apbp.penable <= '0'; tb_m_apbp.pwrite <= '0'; tb_m_apbp.pwdata <= (others => '0'); tb_m_apbp.pstrb <= "0000"; end if; end procedure;
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