makefile - How to remove file name extension in a loop with Make? -


assume there directory contains foo.c, bar.c , makefile. content of makefile is:

loop:     @for f in $(wildcard *.c) ; \         echo $$f ; \         echo $(basename $$f); \     done

running make prints out following text:

bar.c bar.c foo.c foo.c

what want is:

bar.c bar foo.c foo

so seems basename has no effect in loop. how can make basename work?

your loop not working in make, it's bash loop. if want similar behavior in makeeeze, can have 

loop:     $(foreach f, $(wildcard *.c), \     echo $f; \     echo $(basename $f);)

or 

loop:     $(foreach f, $(wildcard *.c), \     $(info $f) \     $(info $(basename $f)))

the basheese way strip prefix is:

loop:     @for f in $(wildcard *.c) ; \         echo $$f ; \         echo $${f%.c} ; \     done

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